As the structures of the conventional PDP and the PDP apparatus, a commonly-used structure where a display line (L) formed of a set of a sustain electrode (X) and a scan electrode (Y) to be display electrodes (D) and extending in a lateral (first) direction is formed repeatedly (first structure) and a structure where a sustain electrode (X) and a scan electrode (Y) are arranged alternately and display lines (L) are formed of all of the adjacent sustain electrodes (X) and scan electrodes (Y) to be display electrodes (D) (second structure, corresponding to so-called ALIS structure) have been known. In the second structure, an odd-numbered (o) display line (Lo) is formed of a pair of a Y and an X on an upper side thereof and an even-numbered (e) display line (Le) is formed of a pair of the Y and an X on a lower side thereof, and the Y at the center is shared and used for the scan operation in the two adjacent Ls (that is, three Ds).
Further, in a PDP apparatus of the second structure, an interlace driving method is particularly used as its driving method, in which odd-numbered and even-numbered display lines (Lo, Le) are driven and displayed alternately in terms of time. A side to be driven and displayed is called a positive slit (positive side) and a side not to be driven and displayed is called a reverse slit (reverse side).
Further, with regard to the structure of barrier ribs (ribs) in a PDP, a structure where barrier ribs extending in a longitudinal (second) direction are arranged (stripe shape ribs) and a structure where barrier ribs are arranged into a grid shape so as to extend also in a lateral direction (grid shape ribs) have been known. Also, as the structures of the arrangement of Ds (X, Y) in a PDP of the first structure, a structure where X and Y are sequentially repeated such as {(X, Y), (X, Y) . . . } and a structure where pairs of (X, Y) and (Y, X) are sequentially repeated so that an X is adjacent to another X of an adjacent pair and a Y is adjacent to another Y of an adjacent pair such as {(X, Y), (Y, X), (X, Y) . . . } have been known. Further, as a sustain driving method in the PDP of the first structure, a method where adjacent Ds of the reverse slit are set to have the same phase (SSP) and a method where Xs are set to have the same phase and Ys are set to have the same phase (non SSP) have been known.
Further, the structures of address electrodes (A) in PDP of the first and second structures include the following first and second A structures. In the first A structure, one ends of a plurality of As extending approximately in parallel to the longitudinal direction are connected to an address driving circuit (single (one side) A structure). In the second A structure, a plurality of As are divided into two types (Au, Ad) in the upper and lower areas (u, d) of PDP and the two types of As are connected to respectively different address driving circuits, and they (Au, Ad) can be driven from both the sides (double (both side) A structure). In the former, for driving a plurality of (for example, n lines of) Ys, scan pulses are applied to the Ys from the top (first line) to the bottom (n-th line) of the PDP. In the latter, for example, in a group of Ys including (1 to n/2) lines of Ys in the upper area (u) (Yu) and a group of Ys including (n/2+1 to n) lines of Ys in the lower area (d) (Yd), address operation can be simultaneously performed to different two Ys.
Further, a driving circuit (driver) for driving each electrode of a PDP is mounted by an IC (semiconductor integrated circuit) board. Electrodes of a PDP (in particular, bus electrodes) and output terminals of a driver (driver IC) are electrically connected via a connection portion. For example, the ends of the Ys of a PDP and the output terminals of a driving circuit to Y (Y driver) are connected by wirings of a flexible printed circuit board (FPCB) serving as a connection portion.
Furthermore, as a driving method used in a PDP apparatus of the second structure, Japanese Patent Application Laid-Open Publication No. 2003-5699 (Patent Document 1) discloses a progressive driving method by two-stage reset and address operation having address disable operation. In this technology, as the address disable operation, one of adjacent Ls is put into a charge state where address discharge can be made, and the other L is put into a charge state where address discharge does not occur. Then, address discharge is generated in the one of adjacent Ls. By this means, progressive drive is performed.